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NXP Semiconductors /LPC408x_7x /GPDMA /INTSTAT

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Interpret as INTSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INTSTAT0)INTSTAT0 0 (INTSTAT1)INTSTAT1 0 (INTSTAT2)INTSTAT2 0 (INTSTAT3)INTSTAT3 0 (INTSTAT4)INTSTAT4 0 (INTSTAT5)INTSTAT5 0 (INTSTAT6)INTSTAT6 0 (INTSTAT7)INTSTAT7 0RESERVED

Description

DMA Interrupt Status Register

Fields

INTSTAT0

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT1

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT2

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT3

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT4

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT5

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT6

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
INTSTAT7

Status of DMA channel interrupts after masking. Each bit represents one channel: 0 - the corresponding channel has no active interrupt request. 1 - the corresponding channel does have an active interrupt request.
RESERVED

Reserved. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data